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Alif Semiconductor /AE302F80F5582LE_CM55_HE_View /I2C0 /I2C_FS_SCL_HCNT

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Interpret as I2C_FS_SCL_HCNT

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0IC_FS_SCL_HCNT

Description

Fast Mode or Fast Mode Plus SCL High Count Register

Fields

IC_FS_SCL_HCNT

This register must be set before any I2C bus transaction can take place to ensure proper I/O timing. This register sets the SCL clock high-period count for Fast mode or Fast mode plus. This register is written only when the I2C interface is disabled, which corresponds to the I2C_ENABLE[ENABLE] bit is set to 0x0. Writes at other times have no effect. The minimum valid value is 6; Hardware prevents values less than this being written, and if attempted results in 6 being set.

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Register License

THIS SOFTWARE IS PROVIDED “AS IS”. NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ALIF SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data